Seagate Off-Campus Recruitment For Freshers of Batch 2019,2020 & 2021

Seagate Off-Campus Recruitment For Freshers of Batch 2019,2020 & 2021

About: Since 1978, Seagate has been creating precision-engineered data storage technologies that deliver superior capacity, speed, safety, and performance. We help people harness and maximize the datasphere. Seagate couldn’t do any of that without its employees—a diverse workforce of 40,000 creative, hard-working, passionate people all over the world. From Silicon Valley, the United Kingdom, Singapore, India, Thailand, through China, our people are proud to embody the values of integrity, innovation, and inclusion.

Main Points About Seagate Off-campus Recruitment:

Job Position: VLSI – Intern

Eligibility: B.E./B.Tech, M.E./M.Tech

Batch Year: 2019/2020/2021

Job Location: Pune

Experience Required: Fresher

Last Date To Apply: As Soon As Possible

Job Description:

  • Be provided training on Functional Verification Methodologies at IP and SoC levels using SystemVerilog and UVM. After due training, you will be able to work on verifying the design using Synopsys Simulation tools
  • Develop Test-bench & Reference models in IP & SoC level verification environments
  • Document and Implement Verification Plans
  • Work closely with design engineers to create constrained random based test-benches and test cases to meet the required functional and code coverage metrics
  • Debug and help resolve test failures
  • Have the opportunity to create reusable verification environments to be used across multiple teams
  • Complete internship project as per plan

Skill Required

  • Knowledge of ASIC design flow and tools
  • Good understanding of Circuit design, Logic design, Setup time, Hold time, Combinatorial and Sequential circuits, CMOS and Power consumption
  • Self-motivated & a strong team player
  • Strong debug and analytical skills
  • Ability to quickly learn new tools and technologies

Your Experience Includes:

  • Verilog, SystemVerilog, VHDL, UVM or other verification methodologies
  • C++ or other OOP languages with a strong background in OOP concepts
  • Perl, Tcl, Shell or other scripting languages
  • VLSI engineering cycle.


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